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HA-5137A
TM
Data Sheet
April 2000
File Number
2908.5
63MHz, Ultra-Low Noise Precision Operational Amplifier
The HA-5137 operational amplifier features an unparalleled combination of precision DC and wideband high speed characteristics. Utilizing the Intersil Dielectric Isolation technology and advanced processing techniques, this unique design unites low noise ( 3nV Hz ) precision instrumentation performance with high speed (20V/s) wideband capability. This amplifier's impressive list of features include low VOS (10V), wide gain bandwidth (63MHz), high open loop gain (1800V/mV), and high CMRR (126dB). Additionally, this flexible device operates over a wide supply range (5V to 20V) while consuming only 140mW of power. Using the HA-5137 allows designers to minimize errors while maximizing speed and bandwidth in applications requiring gains greater than five. This device is ideally suited for low level transducer signal amplifier circuits. Other applications which can utilize the HA-5137's qualities include instrumentation amplifiers, pulse or RF amplifiers, audio preamplifiers, and signal conditioning circuits. This device can easily be used as a design enhancement by directly replacing the 725, OP25, OP06, OP07, OP27 and OP37 where gains are greater than five. For the military grade product, refer to the HA-5137/883 data sheet.
Features
* Slew Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20V/s * Wide Gain Bandwidth (AV 5) . . . . . . . . . . . . . . . 63MHz * Low Noise. . . . . . . . . . . . . . . . . . . . . . . 3nV/ Hz at 1kHz * Low VOS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10V * High CMRR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126dB * High Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1800V/mV
Applications
* High Speed Signal Conditioners * Wide Bandwidth Instrumentation Amplifiers * Low Level Transducer Amplifiers * Fast, Low Level Voltage Comparators * Highest Quality Audio Preamplifiers * Pulse/RF Amplifiers * For Further Design Ideas See Application Note AN553
Ordering Information
PART NUMBER HA7-5137A-5 TEMP. RANGE (oC) 0 to 75 PACKAGE 8 Ld CERDIP PKG. NO. F8.3A
Pinout
HA-5137A (CERDIP) TOP VIEW
BAL -IN +IN V1 2 3 4 + 8 7 6 5 BAL V+ OUT NC
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Corporation. | Copyright (c) Intersil Corporation 2000
HA-5137A
Absolute Maximum Ratings TA = 25oC
Voltage Between V+ and V- Terminals. . . . . . . . . . . . . . . . . . . . 44V Differential Input Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . 0.7V Output Current . . . . . . . . . . . . . . . . . . . . Full Short Circuit Protection
Thermal Information
Thermal Resistance (Typical, Note 2) JA (oC/W) JC (oC/W) CERDIP Package. . . . . . . . . . . . . . . . . 115 28 Maximum Junction Temperature (Hermetic Package) . . . . . . . 175oC Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
Operating Conditions
Temperature Range HA-5137A-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 75oC
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES: 1. For differential input voltages greater than 0.7V, the input current must be limited to 25mA to protect the back-to-back input diodes. 2. JA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
PARAMETER INPUT CHARACTERISTICS Offset Voltage Average Offset Voltage Drift Bias Current Offset Current
VSUPPLY = 15V, CL 50pF, RS 100 TEST CONDITIONS TEMP. (oC) 25 Full Full 25 Full 25 Full Full 25 25 25 25 25 25 25 25 25 Full Full 25 25 25 25 Full 25 25 25 25 25 25 25 25 Full MIN 10.3 1.5 1000 600 114 5 60 10.0 11.7 220 16.5 14 TYP 10 30 0.2 10 20 7 15 11.5 6 0.08 3.5 3.1 3.0 1.7 1.0 0.4 1800 1200 126 80 63 11.5 13.8 320 70 25 20 1.0 20 3.5 MAX 25 60 0.6 40 60 35 50 0.18 8.0 4.5 3.8 4.0 2.3 0.6 100 40 4.0 UNITS V V V/oC nA nA nA nA V M VP-P nV/ nV/ nV/ pA/ Hz Hz Hz Hz
Common Mode Range Differential Input Resistance (Note 3) Input Noise Voltage (Note 4) Input Noise Voltage Density (Note 5) Input Noise Current Density (Note 5) TRANSFER CHARACTERISTICS Large Signal Voltage Gain Common Mode Rejection Ratio Minimum Stable Gain Gain-Bandwidth-Product OUTPUT CHARACTERISTICS Output Voltage Swing Full Power Bandwidth (Note 6) Output Resistance Output Current TRANSIENT RESPONSE (Note 7) Rise Time Slew Rate Settling Time Overshoot POWER SUPPLY CHARACTERISTICS Supply Current
0.1Hz to 10Hz f = 10Hz f = 100Hz f = 1000Hz f = 10Hz f = 100Hz f = 1000Hz RL = 2k, VOUT = 10V VCM = 10V f = 10kHz f = 1MHz RL = 600 RL = 2k Open Loop
pA/ Hz pA/ Hz V/mV V/mV dB V/V MHz MHz V V kHz mA ns V/s s % mA mA
VOUT = 3V Note 8
2
HA-5137A
Electrical Specifications
PARAMETER Power Supply Rejection Ratio NOTES: VSUPPLY = 15V, CL 50pF, RS 100 (Continued) TEST CONDITIONS VS = 4V to 18V TEMP. (oC) Full MIN TYP 2 MAX 4 UNITS V/V
3. This parameter value is based upon design calculations. 4. Refer to Typical Performance section of the data sheet. 5. The limits for this parameter are based on lab characterization, and reflect lot-to-lot variation. Slew Rate 6. Full power bandwidth guaranteed based on slew rate measurement using: FPBW = ---------------------------- . 2V PEAK 7. Refer to Test Circuits section of the data sheet. 8. Settling time is specified to 0.1% of final value for a 10V output step and AV = -5.
Test Circuits and Waveforms
IN +
-
OUT 1.6k 50pF 400
FIGURE 1. LARGE AND SMALL SIGNAL RESPONSE TEST CIRCUIT
IN IN
OUT OUT
Vertical Scale: Input = 1V/Div. Output = 5V/Div. Horizontal Scale: 1s/Div.
LARGE SIGNAL RESPONSE
Vertical Scale: Input = 20mV/Div. Output = 100mV/Div. Horizontal Scale: 100ns/Div.
SMALL SIGNAL RESPONSE
+15V 2N4416 1000 5k 2k +15V 400 IN + TO OSCILLOSCOPE
NOTES:
OUT 50pF
-
9. AV = -5. 10. Feedback and summing resistors should be 0.1% matched. 11. Clipping diodes are optional. HP5082-2810 recommended.
-15V 2k
FIGURE 2. SETTLING TIME TEST CIRCUIT
3
Schematic Diagram
V+ 7 R25 C7 R15 QP37 D1 QN45 QP55 C5 QD8 QP56 R1A QN47 R2A QN19 QN46 QN13 QN14 C1 QP17 QN51 R14 QN3 R9 QN2 R24 QN12 QN2A QD22 QZ58 QD59 QN24 R4 QN42A QN25 QN39 QD60 C2 R5 R6 R8 R10 R22 R23 QN48 QN49 QN5 QN50 QD23 QN42 QN6 QP40 C6 QD53 QP27 QP36 QP36A QD41 QN1A QN1 QN7 R19 C3 QP30 QN18 QD34 QP21 QD9 QD54 QP26 R18 QN52 QN4 R7 R3 QP26 QP16 QN15 QN29 QD33 QN20 C4 QP32 QP35 QP43 QP44 QP38 R1 R16 R2 R20 R21 R17 1 BALANCE 8
4
HA-5137A
R12 6 OUTPUT R13
QN57
QN10 QN11 4 VSUBSTRATE 3 +INPUT 2 -INPUT
HA-5137A Application Information
RP 10K 1 2 3 4 + 8 7 6 5 V+
NOTE:
Tested Offset Adjustment Range is |VOS + 1mV| minimum referred to output. Typical range is 4mV with RP = 10k. FIGURE 3. SUGGESTED OFFSET VOLTAGE ADJUSTMENT
CS
R1 + R3 R3 C3 R1 + R2
R2
NOTE: Low resistances are preferred for low noise applications as a 1k resistor has 4nV/Hz of thermal noise. Total resistances of greater than 10k on either input can reduce stability. In most high resistance applications, a few picofarads of capacitance across the feedback resistor will improve stability. FIGURE 4. SUGGESTED STABILITY CIRCUITS
Typical Performance Curves
30 20 OFFSET VOLTAGE (V) 10 0 -10 -20 -30 -40 -50 -60 -60 -40 -20 0 20 40 60
Unless Otherwise Specified: TA = 25oC, VSUPPLY = 15V
12 6
VS = 15V, TA = 25oC
10 NOISE VOLTAGE (nV/Hz)
5 NOISE CURRENT (pA/Hz)
8 6 NOISE VOLTAGE
4 3
4
2
2 NOISE CURRENT 80 100 120 0 1 10 100 1K 10K 100K FREQUENCY (Hz)
1
TEMPERATURE (oC)
0 1M
FIGURE 5. OFFSET VOLTAGE DRIFT vs TEMPERATURE
FIGURE 6. NOISE CHARACTERISTICS
5
HA-5137A Typical Performance Curves
0.14 INPUT NOISE VOLTAGE (VP-P) 0.12 0.1 CMRR (dB) 0.08 0.06 0.04 0.02 0 4 6 8 10 12 14 16 18 20 SUPPLY VOLTAGE (V) TA = 25oC
Unless Otherwise Specified: TA = 25oC, VSUPPLY = 15V (Continued)
140 120 100 80 60 40 20 0 10
100
1K
10K
100K
1M
10M
FREQUENCY (Hz)
FIGURE 7. NOISE vs SUPPLY VOLTAGE
FIGURE 8. CMRR vs FREQUENCY
2.60 2.58 BANDWIDTH AND SLEW RATE (NORMALIZED TO 1 AT 15V) 2.56 SUPPLY CURRENT (mA) 2.54 2.52 2.50 2.48 2.46 2.44 2.42 2.40 4 6 8 10 12 14 16 18 20 SUPPLY VOLTAGE (V)
1.10
1.00
BANDWIDTH
0.90 -SLEW RATE 0.80 +SLEW RATE 0.70
0.60
0.50 5 10 15 20 SUPPLY VOLTAGE (V)
FIGURE 9. SUPPLY CURRENT vs SUPPLY VOLTAGE
FIGURE 10. BANDWIDTH AND SLEW RATE vs SUPPLY VOLTAGE
140 120 100 PSRR (dB) 80 60 40 20 0 10 +PSRR GAIN (dB)
40 30 20 10 0 -10 -20 PHASE 90 0 PHASE (DEGREES) GAIN
-PSRR
180 100 1K 10K 100K 1M 10M 100 1K 10K 100K 1M 10M 100M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 11. PSRR vs FREQUENCY
FIGURE 12. CLOSED LOOP GAIN AND PHASE vs FREQUENCY
6
HA-5137A Typical Performance Curves
17 16 AVOL (100kV/V) AND VOUT (V) 15 14 13 12 11 10 9 8 7 6 5 4 0 2 4 6 8 10 LOAD RESISTANCE (k) VOUT TA = 25oC AVOL
Unless Otherwise Specified: TA = 25oC, VSUPPLY = 15V (Continued)
1.05 SLEW RATE NORMALIZED TO 1 AT 30oC 1.04 1.03 1.02 1.01 1.0 0.99 0.98 0.97 0.96 0.95 -60 -40 -20 0 20 40 60 80 100 120
RL = 2K, CL = 50pF, TA = 25oC
TEMPERATURE (oC)
FIGURE 13. AVOL AND VOUT vs LOAD RESISTANCE
FIGURE 14. NORMALIZED SLEW RATE vs TEMPERATURE
2.82 2.80
VO = 0V, VS = 15V
28 24 OUTPUT VOLTAGE (VP-P) 20 16 12 8 4
RL = 2K, CL = 50pF, TA = 25oC
SUPPLY CURRENT (mA)
2.78 2.76 2.74 2.72 2.70 2.68 -55 25 TEMPERATURE (oC) 125
0
0.4
0.8 1.2 1.6 FREQUENCY (MHz)
2
FIGURE 15. SUPPLY CURRENT vs TEMPERATURE
FIGURE 16. VOUT MAX (UNDISTORTED SINEWAVE OUTPUT) vs FREQUENCY
140 120 100 GAIN (dB) 80 60 40 20 0 PHASE 0 -45 -90 -135 -180 100M PHASE SHIFT (DEGREES) GAIN
10
100
1K
10K
100K
1M
10M
FREQUENCY (Hz)
ACL = 25,000V/V Horizontal Scale = 1s/Div. Vertical Scale = 0.002V/Div., EN = 0.08VP-P RTI FIGURE 18. PEAK-TO-PEAK NOISE VOLTAGE (0.1Hz TO 10Hz)
FIGURE 17. OPEN LOOP GAIN AND PHASE vs FREQUENCY
7
HA-5137A Die Characteristics
DIE DIMENSIONS: 104 mils x 65 mils x 19 mils 2650m x 1650m x 483m METALLIZATION: Type: Al, 1% Cu Thickness: 16kA 2kA SUBSTRATE POTENTIAL (POWERED UP): VPASSIVATION: Type: Nitride (Si3N4) over Silox (SiO2, 5% Phos.) Silox Thickness: 12kA 2kA Nitride Thickness: 3.5kA 1.5kA TRANSISTOR COUNT: 63 PROCESS: Bipolar Dielectric Isolation
Metallization Mask Layout
HA-5137A
BAL BAL
-IN V+ +IN
OUT
V-
NC
8
HA-5137A Ceramic Dual-In-Line Frit Seal Packages (CERDIP)
c1 -A-DBASE METAL E b1 M -Bbbb S BASE PLANE SEATING PLANE S1 b2 b ccc M C A - B S AA C A-B S D Q -CA L DS M (b) SECTION A-A (c) LEAD FINISH
F8.3A MIL-STD-1835 GDIP1-T8 (D-4, CONFIGURATION A)
8 LEAD CERAMIC DUAL-IN-LINE FRIT SEAL PACKAGE INCHES SYMBOL A b b1 b2 b3 c MIN 0.014 0.014 0.045 0.023 0.008 0.008 0.220 MAX 0.200 0.026 0.023 0.065 0.045 0.018 0.015 0.405 0.310 MILLIMETERS MIN 0.36 0.36 1.14 0.58 0.20 0.20 5.59 MAX 5.08 0.66 0.58 1.65 1.14 0.46 0.38 10.29 7.87 NOTES 2 3 4 2 3 5 5 6 7 2, 3 8 Rev. 0 4/94
eA
c1 D E e eA eA/2 L Q S1
e
DS
eA/2
c
0.100 BSC 0.300 BSC 0.150 BSC 0.125 0.015 0.005 90o 8 0.200 0.060 105o 0.015 0.030 0.010 0.0015
2.54 BSC 7.62 BSC 3.81 BSC 3.18 0.38 0.13 90o 8 5.08 1.52 105o 0.38 0.76 0.25 0.038
aaa M C A - B S D S
NOTES: 1. Index area: A notch or a pin one identification mark shall be located adjacent to pin one and shall be located within the shaded area shown. The manufacturer's identification shall not be used as a pin one identification mark. 2. The maximum limits of lead dimensions b and c or M shall be measured at the centroid of the finished lead surfaces, when solder dip or tin plate lead finish is applied. 3. Dimensions b1 and c1 apply to lead base metal only. Dimension M applies to lead plating and finish thickness. 4. Corner leads (1, N, N/2, and N/2+1) may be configured with a partial lead paddle. For this configuration dimension b3 replaces dimension b2. 5. This dimension allows for off-center lid, meniscus, and glass overrun. 6. Dimension Q shall be measured from the seating plane to the base plane. 7. Measure dimension S1 at all four corners. 8. N is the maximum number of terminal positions. 9. Dimensioning and tolerancing per ANSI Y14.5M - 1982. 10. Controlling dimension: INCH
aaa bbb ccc M N
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Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (321) 724-7000 FAX: (321) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029
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